Field
The disclosure relates generally to a linear voltage regulator circuits and, more particularly, to a linear voltage regulator circuit device having improved power supply reduction ratio (PSRR) thereof.
Description of the Related Art
Linear voltage regulators are a type of voltage regulators used in conjunction with semiconductor devices, integrated circuit (IC), battery chargers, and other applications. Linear voltage regulators can be used in digital, analog, and power applications to deliver a regulated supply voltage. In power management semiconductor chips, it is desirable to consume the least amount of power possible to extend the battery power. In the initialization of a power management semiconductor chip, a bias current is needed for the internal nodes and branches. This start-up bias current establishes a pre-condition state for many power applications. The bias current magnitude should be a low value to extend battery life. With the reduction of the bias current, leads to bias lines to become high impedance. Additionally, with the reduction of the bias current, noise has a larger influence. The noise signals enter the system through the parasitic capacitance. With the long bias lines on the order of milli-meters, the magnitude of the capacitance, and the noise signal is significant, and impacts the power supply rejection ratio (PSRR).
In systems today, the design methodology typically provide two different methods for biasing for global biasing and local biasing. Current biasing is used for global biasing. Voltage biasing is used for local biasing within the functional block. In an example of a system known to the inventors, a system floorplan design can contain a plurality of digital blocks, a bias block 30, and routing lines. In a large system, the routing lines can be of significant length leading to power supply reduction ratio (PSRR) degradation.
In linear voltage regulators, usage of isolation circuits has been discussed. As discussed in published U.S. Pat. No. 8,525,716 to Bhatia et al describes an isolation network. An electronic circuit comprises a digital-to-analog converter (DAC) core circuit having a current source device and a digital input bit. An isolation circuit is also provided and is connected to the DAC core circuit. The isolation circuit is configured to selectively provide a source bias signal to the current source device. The isolation circuit also is configured to isolate the source bias signal from the current source device based on a state of the digital input bit.
In low dropout regulators, establishing line drivers that address bias supply issues have been discussed. As discussed in U.S. Pat. No. 7,443,977 to Toumani et al., discloses a line driver which includes: at least one amplifier, a delay element, a control signal generator and a generator. At least one amplifier includes at least one bias supply, a signal input and a signal output. The delay element accepts as an input the data signal and delays delivery of the data signal to the at least one line amplifier for amplification. The generator is responsive to a control signal to generate varying voltage levels corresponding thereto on the at least one bias supply of the at least one amplifier. The control signal generator is responsive to the input data signal to detect peaks therein and to generate the control signal corresponding thereto in advance of delivery of the data signal to the amplifier.
In digital-to-analog converter (DAC) circuit utilizes a bias circuit. As discussed in U.S. Pat. No. 6,100,833 to Park et al, describes a digital to analog converter and bias network. A b-bit digital and analog converter addressed non-expensive and monotonic with relatively high differential and integral non-linearities. The converter uses weighed current ratio to achieve decrease the number of current cells to provide a cumulative current which corresponds to the digital value on the input data bus.
In these prior art embodiments, the solution to improve the response for bias line issues utilized various alternative solutions.
It is desirable to provide a solution to address the disadvantages of the low dropout (LDO) regulator for improved PSRR.